Green Streak Programs, founded in 1988, specializes in developing and delivering signal integrity and IBIS modeling seminars and hands-on workshops. VHDL-AMS, Verilog-AMS, and IBIS models can be created and simulated using Mentor Graphics (SystemVision, HyperLynx) and Cadence (Allegro SI) EDA tools.
After attending one of these seminars, an engineer will have an enhanced understanding and ability to apply methodology and tools for high speed modeling and signal integrity.
For on-site workshops, hands-on labs using IBISCenter (developed by Arpad Muranyi of Intel), Mentor Graphics’ HyperLynx, and Cadence’s Allegro SI and Model Integrity can be added to the seminar materials. On-site workshop topics may address methodology, creating and validating IBIS models, and using IBIS 4.2 with SPICE and AMS models. Workshops include hands-on labs to allow attendees to explore the concepts.
BOOK: Semiconductor Modeling: : For Simulating Signal, Power, and ElectromagneticIntegrity
by Roy Leventhal and Lynne Green, Springer, Fall 2006. The focus is on methodology for designing high-speed PCBs, including sections on IBIS modeling and a chapter on model validation. Additional material about the book can also be found at http://www.semiconductormodel.com.
A review by Bob Ross:
Semiconductor Modeling: For Simulating Signal, Power, and Electromagnetic Integrity provides a very readable and excellent resource for several modeling approaches needed in advanced design.
The book includes the broadest coverage to date of all aspects of the IBIS Standard, now well-established in industry. Formal syntactical topics are included along with important practical concerns of model quality and proper usage.
Connecting IBIS with other modeling formats and methods works well and preserves continuity in addressing multiple design issues. So this book is very valuable addition to one's library.
Bob Ross
Teraspeed Consulting Group
Former Chair of the EIA IBIS Open Forum
Dr. Lynne Green worked as a design engineer for many years, most recently with the SPECCTRAQuest group at Cadence Design Systems and previously with the HyperLynx group at Innoveda (acquired by Mentor Graphics). Dr. Green has worked with a number of modeling languages, including SPICE, IBIS, VHDL-AMS, and Verilog-A. She has developed training materials for a number of companies, and is the author of two books and numerous articles. Lynne was Vice-Chair of the IBIS Open Forum from 2002 to 2004. Dr. Green holds a PhD in Electrical Engineering from the University of Washington.
Please contact us for quotes on modeling services and on-site workshops:
Contact: Lynne Green
Email: lgreen22@mindspring.com
Phone: 425-788-0412
Snail mail: 20130 181 st PL NE, Woodinville , WA 98077
See our membership listing on the IBIS Roster page!
http://www.eda.org/pub/ibis/roster/roster.html#GEIA
2008 Seminar Schedule
May 1-2, 2008. IBIS Modeling Seminar, Redmond, WA (near Seattle). Sponsored by Mentor Graphics (http://www.mentor.com)
Oct 9-10, 2008 IBIS Modeling Seminar, Fremont, California. Sponsored by Exar (http://www.exar.com)
Interested in having an on-site seminar? Sponsoring a public seminar? The seminars can be arranged for your location.
The Two Day IBIS Modeling Seminar
· IBIS syntax and the IBIS parser
· The IBIS 4.2 specification
· The IBIS Quality Checklist
· Model validation and model accuracy
· Creating IBIS models from SPICE
· Creating IBIS models from test data
· Differential models in IBIS
· Modeling packages and interconnects (PKG, EBD, ICM)
· Touchstone and S-parameters in IBIS
· AMS and SPICE: External circuits and models
Seminars are limited to 20 people. Materials include all handouts and a copy of the book Semiconductor Modeling: For Simulating Signal, Power, and Electromagnetic Integrity, plus a CD containing the handouts, the IBIS Quality Checklist, “good” and “bad” IBIS example files, and selected papers. Lunch is also included.
Examples of Dr. Green’s presentations.
HyperLynx and the IBIS Quality Checklist, L. Green and M. Pillie, Mentor User2User 2005
Slides http://www.mugweb.org/members/conferences/2005/green_greenstreak_pres.pdf
Full paper http://www.mugweb.org/members/conferences/2005/green_green_streak_programs.pdf
IBIS Workshop, JEDEX 2004http://www.vhdl.org/pub/ibis/training/IBIS_class_JEDEX_2004.zip
The IBIS Model Review Committee http://www.vhdl.org/pub/ibis/summits/jun04/green.pdf
Use of [Ramp] in IBIS 4.1 http://www.vhdl.org/pub/ibis/summits/oct03/green.pdf
A BIRD75 Multi-lingual Example http://www.vhdl.org/pub/ibis/summits/jan03/green_l.pdf
Modeling Approaches - Tables and Equations http://www.vhdl.org/pub/ibis/summits/jan00/green.zip
Modeling Links
IBIS Home Page (follow links to Cookbook, Summits, Training, s2ibis3, Model Review Committee, etc.)
http://www.eigroup.org/ibis/ibis.htm
Compact Model Council
VHDL, VHDL-AMS
Verilog, Verilog-AMS, SystemVerilog
http://www.vhdl.org/, http://www.accellera.com/
Compact Models for Power Devices (Peter Lauritzen, University of Washington)
http://www.ee.washington.edu/research/pemodels/
Timing Analysis http://download.intel.com/education/highered/signal/ELCT762/Class02_Signal_Parameters_I.ppt
UC Berkeley SPICE Home Page http://infopad.eecs.berkeley.edu/~icdesign/SPICE/
Bit Error Rate Analysis http://si-list.org/files/tech_files/ber_white_paper.pdf
Other links of interest
Roy Leventhal
http://semiconductorsimulation.com
Bogatin Enterprises
Teraspeed
Step Response SI Consulting, Inc
http://www.StepResponseSI.com/, Tony Dunbar, enquiries@stepresponsesi.com, Mobl: 469 360 5839
Simberian (S-parameter extraction)
Differential termination for various interface standards
http://pdfserv.maxim-ic.com/en/an/hfan10v2.pdf
Windows version of FastHenry field solver
http://www.FastFieldSolvers.com
MEMS group at the University of Washington